1. The easiest thing to do, and this works with the existing pinout, is to run 3 voltages. Set VCC1 as high as desired. Set VCC2 and VEE2 at + / – 5.7V. This will not cause A1 problems, particularly with the Version 2 IC's, where A1’s output is very insensitive to the rail voltages. This will still allow the output to go above 3.5 Volts but there will be no problems with oscillations. Anadyne had an internal test board that was giving us problems. We did this, and all problems went away. You can even run VCC2 a little higher than VEE, but if there is too big a difference, the DC adjust to the log outputs, which is done using S+ and S-, causes temperature drift. In addition the output will become sensitive to the rail voltages. Running the suggested voltages works perfectly, and the only disadvantage is the need for an extra positive voltage regulator.

If it is necessary to run VCC2 higher than 6V, then we recommend that you switch off the S- L+ side, and use a single ended output from the logging section. The IC can then be run with a single regulator feeding VCC1 and VCC2. Switching off S- requires connecting a 1K resistor from S- (pin 15) to VCC2, a 3K or 3.3K resistor from S- to ground, and grounding pin 21. (see Fig 2) Make sure that you have connected the resistors to S-, before shorting pin 21 to ground. You will also need to double the gain of the output amplifier by increasing its feedback resistor.

With this setup you can run any values of VCC and VEE that you want, and we suggest that you choose a value of VCC that will meet your needs, and then set VEE up so as to zero the output to within 100mv of ground when A1, A2 and A3 have been zeroed. This would be a one time choice, There will still be some variation in the output voltage from chip to chip but these will be small enough so they can be corrected by putting a resistor from S+ to VCC or ground, depending on whether the offset is positive or negative. As long as the offset is less than about 150mv before trimming, there will be no problem with PSSR or temperature. If you have access to the log out DC adjust pin because you are using die, or have the new (pinout H) package where this is pinned out, you should use this pin to null the output.

2. If you choose to run VCC2 and VEE at substantially different voltages, e.g. 7 and 6V respectively, it is important to make the large DC offset at the output of the loggers vanish, You may choose to run VEE and VCC at any voltages you desire. However, you must run single ended as described in the paragraph above, and you cannot use S+ to adjust the DC offset. Instead you have to use the logout DC adjust pad and proceed as follows.

Connect two resistors to the log DC out adjust pad, one going to VCC and the other to VEE. The sum of the resistor values should not exceed 7K. Adjust the values to zero the output. Secondly you will have to make your voltage regulators dual track. To do this see figure 3. If you do not do this then the output voltage will drift with the regulators. If you have regulators that have less than 15mv drift over the temperature range you require, this last step is not necessary.

Please contact Anadyne if you do have problems running higher VCC and none of these methods prove satisfactory.