11 of 70 
6 7 8 9 10 11 12 13 14 15 16  
connecting C15 from pin 21 to pin 20.  Also, see the output amp speedup suggestions in section
10.1, item 4.  For additional details on pulse shaping, e.g. driving lossy cables and/or improving
settling time, see section 4.
The output transistor has a very low quiescent current, and will not go negative with any
appreciable load.  For example, with a 93-ohm load it will not go below about -100 mV.  If biased
so that the output limits negative, the output pulse-shape will show a dip on the leading edge, and
the amplifier will not provide an accurate transfer function.  If it is necessary to offset the output
negative and drive a low-impedance load, an output buffer amplifier should be used.
2.6  NEGATIVE AND BIPOLAR OPERATION
The output stage of A1 is an emitter follower which carries a very low quiescent current.  It will not
provide a full negative output swing because the A1 load internal to the IC is about 150 ohms. 
However, connecting a resistor or current sink from the A1 output (pin 6) to V
EE
will permit a
negative A1 output swing to about -2.3 volts.  Because there is a small internal resistance (about 5
ohms) between the internal output of A1 and pin 6, connecting a current sink to pin 6 will not only
lower the apparent output of A1, but will also offset the negative A1 input (pin 35) when the real
output (to A2) is zero.  See Fig. 2.6, below.
If left uncorrected, this effect would upset temperature behavior somewhat, as all thermal
corrections in the L-17C are accurate to at least second order.  Although this would not be a
problem with applications using baseline restorer loops, and even for many DC- coupled
applications, it is in any case easily rectified as follows:
1.
Before connecting the resistor from pin 6 to V
EE
, balance A1, A2, and A3 using the
normal procedure (sub-section 5.3.3).
2.
Connect the resistor from pin 6 to V
EE
(about 15 mA is needed to swing -2 volts).
3.
Restore the output of A2 to zero by using RT1 to offset pin 2 (see Fig. 2(a); RT1 is
connected to V
EE
).
Note that pin 35 will still be offset, because of the current flow.
-10-
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