connecting capacitors [Fig. 2(b)] from their outputs to their negative inputs (C6 from pin 29 to pin
31 for A2, and C12 from pin 26 to pin 24 for A3). To speed them up, connect a capacitor or RC
combination
(3)
from the negative input to ground (C8 from pin 31 for A2, and C10 from pin 24 for
A3. This may prove useful when trying to minimize the transit-time shift of the output as a function
of the input power. However, even without adjustment, the rise time is not particularly sensitive to
the input power level.
2.4 LOGGING SECTION
The logging section has two adjustments in addition to the linear extension. The start of logging
can be lowered about 1 dB by raising the L1 current by up to 30%, or increased about 6 dB by
tying pin 9 to ground. Also, the current in L6 can be adjusted by R110 if a lot of linear extension is
needed. In practice, the latter adjustment is not necessary unless log ranges in excess of 45 dB
are required.
The summing junctions (pins 8 and 15) are pinned out to facilitate the manufacture of dual
detector log video amplifiers (dual DLVAs). Note that these are high-impedance nodes, and care
should be taken not to load them capacitively. Probing these points with a passive probe will not
give an accurate representation of the waveform. If it is necessary to examine the waveform at
these points, an active probe with a capacitance less than 2 pF must be used.
OUTPUT AMPLIFIER
The output amplifier has a full-differential input and a single-ended output which is short-circuit
protected at about 50 mA. The maximum output voltage is about 3.2 volts. Provision has been
made to connect a discrete npn in parallel with the output driver transistor on the IC. All that is
required is to connect the emitter to pin 18, the base to pin 17, and the collector to the unregulated
V+ input. Drawing large currents from the regulators is undesirable, as the output impedance of
the regulators is high at frequencies above 10 kHz. For 50-ohm loads with outputs greater than
1.5 V it is essential to use the outboard transistor in order to achieve optimal pulse-shape, and it is
strongly recommended for 93-ohm loads. Any low-input-capacitance fast npn (f
T
1 GHz) which
can deliver the required current is satisfactory.
The output amplifier can be slowed down by connecting a capacitor, C14, from pin 20 to ground.
However, this will result in slew-rate limiting if too large a capacitor is used, and it is preferable to
use a capacitor (C16) from pin 19 to pin 20 if substantial bandwidth-limiting is needed.
(4)
The
amplifier can be speeded up by connecting a capacitor (C18) from pin 19 to ground, or by
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(3)
See section 4 on pulse shaping.
(4)
In most cases, bandwidth limiting is only needed to reduce noise. In such instances, A3 or A2
can be slowed down.
-9-
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